Once a yr the promise of tremendous sizzling potatoes graces the semiconductor world. Hot Chips in 2021 is ready to be held just about for the second successive yr, and the presentation schedule has simply been introduced. Coming this August, there will probably be deeper disclosures on next-generation processor architectures, infrastructure compute platforms, new enabling applied sciences resembling processing-in-memory, various upcoming AI options, in addition to a deeper look into customized accelerators. 

If you thought final yr’s Hot Chips was convention, this one is a robust competitor. Hot Chips is an annual two-day semiconductor disclosure occasion the place the newest processor know-how from across the {industry} (besides Apple*, see on the backside) is introduced by the engineers behind the tasks. Various key gamers use Hot Chips as the primary alternative to advertise key particulars of their designs available in the market for potential prospects, and startups with sufficient backing additionally get to speak about what makes their new chips distinctive in a crowded market. 

A spotlight of every occasion can also be the keynotes, with earlier years involving Dr. Lisa Su, CEO AMD discussing the businesses success, Dr. Phillip Wong of TSMC giving the lay of the land at the vanguard of producing, Jon Masters of Red Hat going by various the problems stemming from Spectre and Meltdown, and Raja Koduri masking Intel’s imaginative and prescient of a full scalar-vector-matrix-spatial XPU technique.

TSMC Keynote, Hot Chips 31 (2019)

Normally Hot Chips is an on-location occasion, however much like final yr because of restrictions on journey it is going to be an all-virtual occasion once more. This signifies that most shows are pre-recorded, however there was loads of interplay on the occasion final yr. Anyone can attend, and the digital costs are low, at most $160, which supplies the attendee with dwell shows, an opportunity to ask Q&A, entry to all of the slide decks, and continued entry to the talks for a number of months earlier than they’re made public. Last yr’s on-line answer went rather well.

This yr’s occasion will probably be held August 22-Twenty fourth, and can run to the Pacific Time Zone. All instances beneath are in PT.

Hot Chips 33 (2021) Schedule
AnandTech Time and Session Session Title
Day 0

Aug twenty second
08h30 Tutorial 1 ML Performance
14h00 Tutorial 2 Advanced Packaging
Day 1

Aug twenty third
08h45 Session 1 Processors
11h30 Session 2 Academic Spinout Chips
12h30 Keynote Synopsys
14h30 Session 3 Infrastructure and Data Processors
16h00 Keynote Skydio
17h30 Session 4 Enabling Technologies
Day 2

Aug Twenty fourth
08h30 Session 1 ML Inference for the Cloud
10h00 Keynote Department of Energy
11h30 Session 2 ML and Computation Platforms
14h30 Session 3 Graphics and Video
17h00 Session 4 New Technologies

Here’s a fast overview of the Hot Chips 2021 schedule.

Day 0: Tutorial Day

Because Hot Chips caters to each professionals and college students, the pseudo-first day of the occasion is usually an opportunity for attendees to become familiar with new matters within the {industry}.  Of late these periods have lined matters resembling constructing scaleout programs, quantum computing, new networking paradigms, and safety.

Hot Chips 33 (2021): Tutorial Day

August twenty second, Sunday
AnandTech Info
08h30 – 13h00 Machine Learning Performance
Hardware and software program co-optimization of the industry-standard MLPerf benchmarks, in addition to functions, efficiency traits, key challenges, and issues for these deploying distinctive workloads
14h00 – 17h15 Advanced Packaging
How superior packaging methods allow efficiency and density enhancements, masking how present applied sciences available in the market work, how they’re used, and the chopping fringe of packaging and chip design by the {industry} leaders

The first tutorial right here is an enlargement of earlier talks by MLCommons, the included {industry} physique behind MLPerf. Over the previous yr we have now seen the benchmark attain a full v1.0 with respect to inference, and far in the identical method that the industry-standard SPEC benchmarks are optimized to the n-th diploma, this session is right here to help with how firms can optimize their {hardware} and software program stack to get one of the best MLPerf outcomes.

The second tutorial sounds actually fascinating. Packaging (and interconnect) are the subsequent frontiers of scaled computational assets, with numerous analysis from the massive gamers already put to make use of in trendy mobile processors to huge AI chips. This session is prone to cowl TSMC’s 3DFabric household of packaging strategies, together with related roadmaps that have been disclosed final yr, but in addition Intel’s EMIB, Foveros, and ODI packaging. Other firms with superior packaging merchandise are additionally prone to become involved in how they use TSMC’s and Intel’s designs.


Day One: Morning

Day One goes to be very busy, and is break up into six periods, from 8:45 am to 7pm PT.

As with any convention, the opening minutes are spent detailing the convention, what’s new for the yr, and a few of the guidelines (resembling no streaming). I believe there will probably be a big dialogue about how the COVID scenario will have an effect on the shows, what to do if one of many shows fails, or such. I really hope that the shows are pre-recorded in order that doesn’t occur.

The first session is on Processors.

Hot Chips 33 (2021): Day One, Session 1

Server Processors
AnandTech Speaker Company Info
08h45 Opening Remarks
09h00 Efraim Rotem Intel Intel Alder Lake CPU Architectures
09h30 Mark Evers AMD AMD Next Generation Zen 3 Core
10h00 Christian Jacobi IBM The > 5 GHz next-generation IBM Z processor chip
10h30 Arijit Biswas Intel Next-Generation Intel Xeon CPU

Sapphire Rapids
Sailesh Kottapalli

The first official day of shows all the time begins with discussing modern processors, and this yr appears to be like to be a stellar set of talks. 

First up is Intel discussing Alder Lake, its second-generation heterogeneous processor structure (after Lakefield) that’s set to be the next-generation processor for each desktops and high-end laptops. We already know that Alder Lake will use each Golden Cove and Gracemont microarchitectures, to the hope right here is that Intel will spend time going deep into each. Normally that is the type of factor they might have disclosed over a number of hours at an Intel-specific occasion, and given half-hour for the speak I ponder how a lot will really be disclosed – it would as an alternative be a chat solely concerning the SoC and we cannot get microarchitecture element in any respect.

Second is an AMD speak about its newest Zen 3 core microarchitecture. As Zen 3 was launched into the market in This fall final yr, with an up to date back-end and unified L3 cache construction, I doubt we are going to see something new on this speak. The {hardware} has been completely examined; AMD usually makes use of Hot Chips to refresh what’s already out available in the market, and there is an RDNA2 speak on the second day which is predicted to be of an identical nature.

Third is IBM discussing its next-generation mainframe structure and product line, the Z processor. We’ve lined IBM discussing z14 and z15 in earlier Hot Chips occasions, and so that is both a deeper dive into z15 (which was introduced final yr in numerous element) or a brand new have a look at an upcoming z16 design. The Z mainframe answer normally consists of compute processors and management/cache processors throughout a unified multi-rack method – as a result of this speak is titled ‘processor chip’, I believe it’s extra concerning the compute processor than the answer, however hopefully there will probably be a slide or two on the way it all suits collectively.

The remaining speak of the session is one other Intel speak, this time discussing the upcoming next-generation Sapphire Rapids platform, set to launch both someday on the finish of this yr or early subsequent yr (Intel has a contract with DoE for the Aurora supercomputer it must fill by the top of the yr with this half, so common availability could be after). Sapphire Rapids is utilizing Intel’s 10nm Enhanced SuperFin course of, and the identical Golden Cove cores talked about in Alder Lake, although maybe cache optimized for server use. I believe this speak will probably be heavy on the die configuration and new parts, resembling PCIe 5.0 and DDR5.


After a brief break, we get to the Academic part. 

Hot Chips 33 (2021): Day One, Session 2

Academic Spinout Chips
AnandTech Speaker Company Info
11h30 Karu Sankaralingam University of Wisconsin-Madison Mozart, Designing for Software Maturity and the Next Paradigm for Chip Architectures
12h00 Todd Austin University of Michigan Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware

It’s not typically we pay an excessive amount of consideration right here given the analysis nature of the units, nonetheless the second speak on a RISC-V safety extension is slightly fascinating. Coming from the University of Michigan, the Morpheus II core has been reported as being the goal for 500+ cybersecurity researchers for 3 months as a part of the DARPA red-teaming problem, and had zero penetrations in that point.


Day One: Keynote One

12h30 Aart de Geus Synopsys Synopsys Keynote

This yr is a bit of totally different to most, with the primary day having two separate keynotes. First up is an untitled presentation from the CEO of Synopsys, an organization well-known within the {industry} for its EDA (digital design automation) instruments. This consists of logic synthesis, place and route, static timing evaluation, {hardware} language simulators, and transistor-level circuit simulation. This speak ought to give the corporate an opportunity to debate its next-generation applied sciences, particularly as we transfer into an period of 3D design and packaging.

When we get the total title of the speak, this section will probably be up to date.


Day One: Afternoon

After lunch the subsequent sequence of talks are on non-standard processor designs, usually optimized for infrastructure or information processing.

Hot Chips 33 (2021): Day One, Session 3

Infrastructure and Data Processors
AnandTech Speaker Company Info
14h30 Andrea Pellegrini Arm Arm Neoverse N2: Arm’s second-generation high-performance infrastructure CPUs and system merchandise
15h00 Idan Burstein NVIDIA NVIDIA Data Center Processing Unit (DPU) Architecture
15h30 Bradley Burres Intel Intel’s Hyperscale-Ready Smart-NIC for Infrastructure Processing

The first speak is relating to Arm’s Neoverse N2 core, the upgraded mannequin of the N1, which was introduced in late April. N2 merchandise aren’t due out till subsequent yr, nonetheless firms working with N2 are possible already designing their SoCs with the core. Arm did not disclose lots of the pipeline particulars within the April announcement, and so we would see extra info alongside these strains, nonetheless there’s the potential for it to only be the identical announcement as April. We shall wait and see.

The second speak from NVIDIA is about its Data Processor Unit structure, often known as Bluefield. Coming from its acquisition of Mellanox, the Bluefield line of DPUs permits Smart-NIC like community acceleration by integrating a community controller, general-purpose compute cores, and PCIe connectivity into the identical gadget. The newest product is Bluefield-2, nonetheless murmurings of Bluefield-3 have been made as to the longer term roadmap alternative. The title of the speak doesn’t particularly state NVIDIA will speak about present technology architectures or subsequent technology.

Third up is the Intel SmartNIC answer which has been introduced beforehand because the C5000X platform. Various Intel’s prospects and OEM companions, are already delivery the {hardware}, based mostly on Intel Altera FPGAs, to key prospects resembling Baidu. Partners resembling Silicom are promoting the elements underneath their very own model. There hasn’t been a lot presentational materials concerning the structure of the SmartNIC, so this could be an fascinating perception into one in all Intel’s new market pushes.

Day One: Keynote Two

In an fascinating flip of occasions, the primary day of Hot Chips has two keynotes.

16h00 Abraham Bachrach Skydio Skydio Autonomy Engine: Enabling the Next Generation of Autonomous Flight

The second keynote of the day comes from Skydio, an organization I had not heard of earlier than the announcement, however seems to be on the vanguard of AI-based pilot know-how. The Skydio 2 platform for instance appears to be powered by an NVIDIA Tegra TX2, and the idea of autonomous flight / drone know-how has all the time been on the cusp within the evolution on AI. Skydio appears to be like set to speak about its next-generation platform, provided that its Skydio 2 was launched in 2019 and since then it has had one other spherical of VC funding.


Day One: Even More Talks

To finish the primary day, Hot Chips will focus on future applied sciences. After a protracted day, I do surprise why they do not prolong Hot Chips out into a 3rd day of talks – usually at this level I’m actually on info overload. Out of the three talks on this session, the one I’m most conversant in is the ultimate one, by Samsung, about its compute-in-memory answer.

Hot Chips 33 (2021): Day One, Session 4

Enabling Technologies
AnandTech Speaker Company Info
17h30 Ramanujan Venkatadri Infineon Heterogeneous computing to allow the best degree of security in automotive programs
18h00 Sriram Rajagopal EdgeQ Architecting an Open RISC-V 5G and AI SoC for Next Generation 5G Open Radio Acess Network
18h30 Jin Hyun Kim Samsung Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for machine studying accelerators

The Aquabolt-XL was unveiled earlier this yr, with Samsung in a position so as to add compute cores per reminiscence financial institution into its HBM2 reminiscence with none {hardware} modifications on the host facet. Aquabolt-XL works by sending instructions to particular reminiscence addresses and may carry out easy compute duties on its in-order cores on the information inside that reminiscence financial institution. The concept is that vitality will probably be saved by not having to maneuver information from reminiscence to the core for the best operations. At the time, I requested Samsung if this requires further energy, as different compute-in-memory options, and Samsung mentioned no – that is very a lot a easy drop-in alternative for any HBM2 answer at this time, and requires software program modification to be used.


Day Two: Morning

The second day begins early, at 8:30am, and runs till 7pm. The first session begins with discussing Machine Learning inference processors from a few of the huge firms searching for cloud deployment.

Hot Chips 33 (2021): Day Two, Session 1

ML Inference for the Cloud
AnandTech Speaker Company Info
08h30 David Ditzel Esperanto Technologies Accelerating ML Recommendation with over a Thousand RISC-V Tensor Processors on Esperanto’s ET-SoC-1 Chip
09h00 Ryan Liu Enflame Technology AI Compute Chip from Enflame
Chuang Feng
09h30 Karam Catha Qualcomm Qualcomm Cloud AI 100: 12 TOPs/W Scalable, High Performance and Low Latency Deep Learning Accelerator

The first speak on this session is from Esperanto, a startup with $58m+ in funding to create advice engine processors for the might. All the key hyperscalers and retailers use advice engines – displaying customers what product would most curiosity them at any given time. Esperanto’s answer appears to be a 1000-core RISC-V answer, with mixed tensor cores for inference acceleration. This speak needs to be the primary disclosure of the chip and the structure beneath.

Second is one other AI semiconductor startup, this time from China with a big backing from Tencent. The final funding spherical in January this yr was for some $279m+ in Series C, though precisely what Enflame is producing hasn’t been introduced. 

Qualcomm’s AI 100 answer is third, a product that was introduced simply after Hot Chips final yr. This AI inference processor is the highest model of a spread of AI inference {hardware} constructed on the identical structure beneath. The Qualcomm Cloud AI 100 has a reported pace of 400 TOPs for 75 W, though probably the most environment friendly model is aiming for 12 TOPs per Watt. I anticipate this speak to enter the structure particulars of the processor household.


Day Two: Keynote

The second day solely will get a single keynote sooner than traditional, however this one needs to be fascinating as it’s from the US Department of Energy.

10h00 Dimitri Kusnezov DoE DoE AI and Technology

In this occasion, the Deputy Under Secretary for AI and Technology will current an unnamed speak, which might cowl various talks from the usage of AI in present DoE deployed programs, or the DoE method to adopting AI at scale, in each coaching and inference. Various firms at this occasion have contracts with the DoE in some kind, making it an fascinating speak from our perspective.


Day Two: Home Stretch

Continuing the machine studying theme, the second session of the day earlier than lunch is about greater AI chips constructed extra for coaching, in addition to a particular shock.

Hot Chips 33 (2021): Day Two, Session 2

ML and Computation Platforms
AnandTech Speaker Company Info
11h30 Simon Knowles Graphcore Graphcore Colossus Mk2 IPU
12h00 Sean Lie Cerebras Systems The Multi-Million Core, Multi-Wafer AI Cluster
12h30 Raghu Prabhakar SambaNova Systems Inc SambaNova SN10 RDU: Accelerating Software 2.0 with Dataflow
Sumti Jairath
13h00 J. Adam Butts D.E. Shaw Research The Anton 3 ASIC: a Fire-Breathing Monster for Molecular Dynamics Simulations
David E. Shaw

The first speak is from Graphcore, speaking about its Mk2 IPU product household. Graphcore has been speaking concerning the Mk2 IPU deployment for over a yr, together with its four-IPU single server 1U answer all the best way as much as an IPU Pod and past. This speak appears to be a recap of the underlying structure simply at a distinct occasion, though fingers crossed we see one thing a few roadmap right here as properly.

The second speak is Cerebras Systems with its second-generation Wafer Scale Engine – a CPU the scale of your head with 850,000 cores, and one wafer turns into one chip. Having introduced WSE-2 originally of the yr, one of many highlights of these shows was utilizing a number of WSE-2 programs in the identical rack to scale out the answer. That appears to be the main focus of this speak.

Third is SambaNova, one of many AI firms that has lately introduced tons of of thousands and thousands of their newest rounds of funding. The Cardinal AI answer from SambaNova is concentrating on AI coaching, and scaling throughout many programs in a reconfigurable gate array structure, similar to that of an FPGA however geared in direction of AI. SambaNova has introduced its structure at just a few choose conferences, nonetheless this would be the first time I’ve seen a chat on the subject.

Finally we have now the shock speak of the occasion, no less than from my perspective. Here’s a query – what do you do if there is no {hardware} available on the market to resolve your drawback? Simple, construct your individual! The Anton 3 ASIC is next-generation devoted {hardware} for molecular dynamics for all these molecular modeling issues that take too lengthy to finish on typical {hardware}. The story behind how the Anton 3 got here into being appears fascinating from my brief analysis, so I hope it turns into part of the speak. The Anton 2 chip was introduced at Hot Chips 26, in 2014, earlier than I began masking the occasion.

After one other lunch, the subsequent session will excite various customers, as they breach the subject of graphics disclosures. It appears to be like like we will get a few good ones this yr, regardless of the present state of the graphics market.

Hot Chips 33 (2021): Day Two, Session 3

Graphics and Video
AnandTech Speaker Company Info
14h30 David Blythe Intel Intel’s Ponte Vecchio GPU Architecture
15h00 Andrew Pomianowski AMD AMD RDNA 2 Graphics Architecture
15h30 Aki Kuusela Google Google’s Video Coding Unit (VCU) Accelerator
Clint Smullen
16h00 Juanjo Noguera Xilinx Xilinx 7nm Edge Processors

First up is Intel discussing its Xe-HPC structure, or slightly particularly its Ponte Vecchio HPC chip that makes use of 47 tiles from a number of course of nodes on a single substrate. Ponte Vecchio was initially designed for the Aurora Exascale Supercomputer venture, and will probably be partnered with Sapphire Rapids. As the chip is due to be shipped to manufacturing programs later this yr, an expose on the structure is broadly welcomed.

The second speak will probably be AMD recapping its RDNA2 structure, which is now on the coronary heart of a lot of its graphics merchandise.

The third speak is one which pursuits me comes from Google – as with all issues at Youtube, it needs to be completed at scale, and ensuring that each video on the platform is offered at a number of resolutions requires loads of computational assets. To assist pace that up, Google constructed its personal video co-processor, and thru 2021 has been disclosing bits of the way it works. Currently, the VCU solely caters for a few probably the most common codecs, however hopefully we are going to get an perception into what future variations may carry with AV1 and newer codecs.

Finally for this session, Xilinx will speak about its 7nm processor designs for the sting which it introduced earlier this yr.

The remaining session of the occasion is filed underneath ‘New Technologies’. Everything right here is not strictly to do with processors, however actually entails Hot Chips.

Hot Chips 33 (2021): Day Two, Session 4

New Technologies
AnandTech Speaker Company Info
17h00 Michael Wiemer Mojo Vision Mojo Lens – AR Contact Lenses for Real People
Ranaldi Winoto
17h30 Sukki Yoon Samsung World’s Largest Mobile Image Sensor with All Directional Phase Detection and Auto Focus Function
18h00 Hidekuni Takao Kagawa University New Value Creation by Nano-Tactile Sensor Chip Exceeding our Fingertip Discrimination Ability
18h30 Christopher Monroe IonQ Inc The IonQ Trapped Ion Quantum Computer Architecture


*A very good variety of engineers from Apple attend the occasion yearly, and ask loads of questions, nonetheless they’ve by no means introduced a chat. These occasions are sometimes a collaborative {industry} disclosure mechanism, and provides an opportunity for firms to current their finest know-how in addition to quiz their rivals. Apple’s engineers are comfortable to ask numerous questions, however up to now they’ve by no means had a chat ok to be introduced (I’m fairly certain they’ve by no means submitted a chat) or sponsored the occasion in any capability. 


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